Many new CPU architectures such as the Omap ARM core use adaptive clocking techniques to synchronize JTAG signals to its internal core clock. Often a TCK_RET (Return TCK) is a dedicated output pin on the device used throttle the Emulation Controller. There seems to be a trend of increasing cpu non-compliance, how should SJTAG contend with this if system level emulation is a desired SJTAG usecase. TDO and TCK_RET would need to be skew matched through the system and Gateways would have to account for this as well.
Board level emulation is difficult enough propagating it to a the system would require an added level of complexity .
Good Technical Reference
http://www.blackhawk-dsp.com/downloads/ ... -TA-01.pdf
http://www.blackhawk-dsp.com/downloads/ ... -QS-01.pdf
Adaptive Clocking / JTAG Synchronization
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Re: Adaptive Clocking / JTAG Synchronization
I've seen TCK_RET (or RTCK) supported by a number of gateways (or at least providing a means by which it could be routed), but hadn't actually encountered a device that wanted to modulate TCK, so it isn't something I've actually paid a lot of attention to. If I recall, RCLK was part of P1149.2, so this isn't something new, just something uncommon. Possibly a bigger issue is whether external TAP controllers (the cheaper/simpler ones anyway) can cope with this.
Ian McIntosh
Testability Lead
Leonardo UK
Testability Lead
Leonardo UK
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Re: Adaptive Clocking / JTAG Synchronization
Reference Link BTW paper support of multiple Hosts
WHITE PAPER
http://www.molesystems.com/BTW/material ... 0(3.3).pdf
SLIDES
http://www.molesystems.com/BTW/material ... Slides.pdf
WHITE PAPER
http://www.molesystems.com/BTW/material ... 0(3.3).pdf
SLIDES
http://www.molesystems.com/BTW/material ... Slides.pdf