Big (Hot) Topics for system JTAG architectures

Hardware Architectures Document
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Heiko Ehrenberg
SJTAG Vice Chair
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Joined: Wed Nov 21, 2007 3:15 pm
Location: GOEPEL Electronics - Austin, TX

Big (Hot) Topics for system JTAG architectures

Post by Heiko Ehrenberg »

What are the "big topics" for system JTAG architectures?

An initial list from Ian, with additions made during our Mar-8-2010 conference call, includes the following:
  • Gateways. The issues with tooling, features on gateways, differences and similarities between gateway devices, etc.
  • Using OEM boards or mezzanines. For some there will be no issue here as everything will be designed in-house. Others will make extensive use of OEM parts.
  • Results storage and retrieval in embedded applications. May or may not be an issue.
  • Design Security. Can you make use of design security features and retain adequate access for test, update etc.?
  • Test reuse
  • Storage / application of test vectors in embedded applications
  • Pre-configured vs. non-configured devices (FPGA's) at time of test - may require different BSDL
Anything else?
- Heiko
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Ian McIntosh
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Joined: Mon Nov 05, 2007 11:49 pm
Location: Leonardo, UK

Re: Big (Hot) Topics for system JTAG architectures

Post by Ian McIntosh »

One subject missing form this list that we did mention previously:
  • Backplanes - Active vs Passive; re-buffering and termination; incorporating backplane nets into system design data
Ian McIntosh
Testability Lead
Leonardo UK