"Educational" themes for SJTAG

Discuss the generic proposals for SJTAG
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Ian McIntosh
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"Educational" themes for SJTAG

Post by Ian McIntosh » Wed Mar 09, 2016 5:06 pm

Thread to collect suggestions on where SJTAG has a role in educating or informing the industry (could be both the engineering and management communities).
Ian McIntosh
Testability Lead
Leonardo MW Ltd.

User avatar
Ian McIntosh
SJTAG Chair
Posts: 395
Joined: Mon Nov 05, 2007 11:49 pm
Location: Leonardo MW Ltd, UK
Contact:

Re: "Educational" themes for SJTAG

Post by Ian McIntosh » Wed Mar 09, 2016 9:46 pm

The words educate, education and educational appear 22 times in our meeting minutes:
http://www.sjtag.org/index.php/minutes/ ... 2007-11-19 - Carl: A lot of education is needed in industry. Most users feel System Test is done with a Functional Test approach. Why not do System Test as a structural test like what is done at production testing.
http://www.sjtag.org/index.php/minutes/ ... 2008-06-04 - [Brad] This is what is really key about the education. There are so many people that are just not informed about what boundary scan can do for them. We have communities that just think of boundary scan as only an emulation port and don’t use it for manufacturing. We have others that just use if for manufacturing and don’t realize they can use it in system.
http://www.sjtag.org/index.php/minutes/ ... 2008-06-30 - [Brad] Should SJTAG work on establishing a protocol to ensure proper access? [Ian] We should at least provide guidelines as to the need for being aware of these problems. [Brad] At a minimum we should at least make people aware of the problem and educate them to this need.
http://www.sjtag.org/index.php/minutes/ ... 2008-07-16 - simply a reference to a category in an SJTAG survey.
http://www.sjtag.org/index.php/minutes/ ... 2008-09-15 - [Heiko] Part of SJTAG is to apply the standard board level type applications which may include FLASH programming and sometimes worthwhile to have the first CPU device where the TCK rate can run faster than for the CPLDs or FPGA. So keeping the CPU in a separate chain than the FPGAs makes sense. You might want to have one or more devices in a separate chain for certain applications. [Brad] I think this may be too early to be asking that question. Obviously, this is something that could be a guideline or a notice in the standard and not necessarily a rule. I think it is something that we need to educate the community on about the need to be able to support these kinds of features and at least consider it when we do our domain analysis.
http://www.sjtag.org/index.php/minutes/ ... 2010-01-11 - [Ian] What's maybe worrying then is the large percentage of people who have not read the wiki version. [Brad] That means we have some education to do. And the following questions, Q2.2 to the end of the section show that people haven't really read the White Paper.
http://www.sjtag.org/index.php/minutes/ ... 2010-02-22 - [Michele] Maybe it's a mix of people who don't use gateways yet and those who just didn't understand the question. [Eric] Maybe we need to do some education on the website. Put some definitions up. Maybe people don't generally know about the these resynchronization bits.
http://www.sjtag.org/index.php/minutes/ ... 2010-03-22 - [Ian] In my emails with Brad, I said that I wasn't sure if this diagram was part of the White Paper or part of some set of tutorial slides. Either way it's form of education, although Brad commented that he usually found that one-to-one sessions were needed to get the concepts across. (Relates to the diagram here: http://files.sjtag.org/IanMc/Generic_System_v2.pdf)
http://www.sjtag.org/index.php/minutes/ ... 2010-10-04 - [Ian] I know I've run in-house briefings in here on the JTAG related standards work, because I find people don't have the time or inclination to find out about them for themselves. [Brad] I think industry has become too stressed for people to have the time to become educated in these things. That also affects participation in the standards work.
http://www.sjtag.org/index.php/minutes/ ... 2010-10-11 - [Ian] This is where we were concerned about the claims of using CAD to describe the system. [Brad] I was thinking that this maybe more of an education issue; people perceive that they can use CAD, but haven't really crossed the boundary yet. (Relates to 3.8 in survey: http://www.sjtag.org/index.php/news/20- ... -section-3)
http://www.sjtag.org/index.php/minutes/ ... 2010-10-18 - [Brad] There's also the question of granularity. For POST you may only want a Go/NoGo indication on a FRU, while BIST will usually require more detailed indications to chip level. [Brad] We need to spend some time on education. Recovery is the #1 priority here. (Relates to 9.11 in survey: http://www.sjtag.org/index.php/news/20- ... tions-9-10)
http://www.sjtag.org/index.php/minutes/ ... 2011-03-14 - Relates to "Education" being a word that appears in Key Takeaways with some frequency.
http://www.sjtag.org/index.php/minutes/ ... 2012-04-23 - Discusses slide 4 here: http://files.sjtag.org/Brad/System%20JT ... 20Role.ppt and the cases for using BIT versus JTAG: [Ian] But if it doesn't load from the Flash, then I probably want to run JTAG so I can determine if there's a physical fault or just a corruption. [...] [Harrison] You and the Telecomm folks might do that, but I don't know that many other sectors have their systems architected for that. [Ian] I think we recognised that SJTAG probably has a role to educate people on what is possible.
http://www.sjtag.org/index.php/minutes/ ... 2012-10-01 - Ian added that P1687 tended to consider only what was within the device but that a lot of system level test may want to use instruments in one device in conjunction with an instrument in another device. This would require an additional layer of coordination. [...] Ian felt that a restatement of the problem space along with descriptions of these emerging issues could be material for the poster. Brad was reminded that part of our role was to educate industry and without a standard we fall back to the education aspect.
http://www.sjtag.org/index.php/minutes/ ... 2012-10-15 - ITC Poster: Heiko shared a rough draft of the poster and asked for feedback / objections on the concept / proposed contents; Brad noted that this is probably the only suitable contents at this time; no objections and Heiko said he’d go ahead and add more contents for review by the group later this week; purpose of the poster would be to educate and to initiate discussions.
http://www.sjtag.org/index.php/minutes/ ... 2013-01-21 - On the Fault Injection Use Case: Brad suggested that the main use was for software validation and that it was generally considered to be outside the scope for hardware designers. It required an 'Aha! moment' to use it for other applications. Brad added that the Venn diagram shows Fault Injection is also in the Reliability area as it can be used during stress testing. It also helps to educate on what you can do with SAMPLE, such as monitoring alarms while the system is running.
http://www.sjtag.org/index.php/minutes/ ... 2014-02-03 - ETS '14: Brad felt that it was an IEEE role to educate, and educating people on the system test problem space was something SJTAG could do.
http://www.sjtag.org/index.php/minutes/ ... 2014-02-17 - Ian thought that if standards like P1687 were being heavily influenced by chip makers then it was understandable that the focus might be on what best serves the chip test, and that board level test aspects like co-ordination across chips might be overlooked. He was surprised that BA-BIST seemed to be drawn towards the chip level. Brad reminded Ian that the BA-BIST activity was created to educate the chip fraternity on what was required to support board test.
http://www.sjtag.org/index.php/minutes/ ... 2014-04-14 - Brad felt that there was ample hardware aspects that could be considered within the bounds suggested to merit a standard such as how chains interact outside the chip. Given that context, Ian wondered if the Dot1 should concentrate on only 1149.1 access mechanisms: That may offer a better engagement for people new to system applications as the additional access links as discussed in the Green Paper may be difficult to grasp. Brad agreed that extending out from the chip as discussed above was probably difficult enough so other access links could be introduced in a further extension. SJTAG still has an educational role to fulfil and bringing people along slowly through the process was part of that.
http://www.sjtag.org/index.php/minutes/ ... 2014-07-21 - In the introduction, there was felt there could be improvements to the start of the second sentence. After discussion this was revised to "The intent of these Green Papers is to inspire collaboration and dialog between members of this industry; also to help educate you to ..."
http://www.sjtag.org/index.php/minutes/ ... 2014-09-22 - The next stage would be to present the architecture, essentially where we thought we were for BTW and expanding on the "cloud" shown on the Ecosystem diagram. Brad proposed re-labelling the Illustrative SJTAG System diagram as "Illustrative SJTAG Infrastructure" to help tie it in with the "cloud". Templates would be too much detail to go into on a poster, but we could leave pointers to the SJTAG website: Start advertising where all these educational resources may be found. (Relates to preparation of ITC poster based on BTW reactions)
http://www.sjtag.org/index.php/minutes/ ... 2015-05-04 - Brad suggests that topics related to fanout and voltage family / device technology related issues should probably be warnings in an SJTAG standard rather than rules. [...] Heiko agreed with Brad that such issues should be addressed by SJTAG, but in an educational way / as warnings, not as a fixed set of rules.

In addition, it was also mentioned a couple of times in the summaries of the 2009 survey results:
http://www.sjtag.org/index.php/news/20- ... -section-3 (3.8)
http://www.sjtag.org/index.php/news/20- ... -section-8 (8.10)
http://www.sjtag.org/index.php/news/20- ... tions-9-10 (Summary and Conclusions)
Ian McIntosh
Testability Lead
Leonardo MW Ltd.

User avatar
Ian McIntosh
SJTAG Chair
Posts: 395
Joined: Mon Nov 05, 2007 11:49 pm
Location: Leonardo MW Ltd, UK
Contact:

Re: "Educational" themes for SJTAG

Post by Ian McIntosh » Tue Mar 15, 2016 6:11 pm

Some things we might take out of the above list to expand on as a Tutorial:
  1. When and why it might be appropriate to use structural test at system level (as opposed to functional test)
  2. Why SAMPLE can be useful in a variety of ways at the system level
  3. Why it is important to have ways to partition and manage chains in a system
  4. Fanout needs extra consideration in system applications
  5. SJTAG has a role to play in co-ordinating the services provided by the likes of 1687 and 1149.1-2013 across devices and boards
Ian McIntosh
Testability Lead
Leonardo MW Ltd.

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