IDCODE and ECID

Discuss the generic proposals for SJTAG
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Ian McIntosh
SJTAG Chair
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IDCODE and ECID

Post by Ian McIntosh » Mon Jul 30, 2012 9:30 pm

Ever since the original IEEE Std. 1149.1 standard was first published we've had IDCODE, but it's remained optional throughout, and that looks to continue with the 1149.1-2013 update. Most modern devices seem to implement IDCODE, so do we know why this remains optional? Without advice to the contrary it seems likely that the option was provided to allow old device technologies that simply couldn't provide the 32-bit register to opt out from that while still providing JTAG support. If that's the case then surely that's history now? Having access to a device ID and possibly to a silicon revision mark could be very useful during many JTAG operations and especially at system level where it may be impossible to inspect for markings on a device or board.

But now 1149.1-2013 looks to be introducing access to the ECID (Electronic Chip ID) that is likely to be less familiar. Again, this will be optional, but perhaps that understandable: The ECID may be several hundred bits long and can contain various details that can, for example, be used to trace an individual die to the wafer it came from. It is unique at the die level and because of this it's likely to appear mainly on higher value silicon product - microprocessors, FPGAs, etc.

There is no defined format or content of the ECID at present, and device vendors are likely to be protective of what data their ECIDs actually contain, at least initially. The ECID has the potential to be a tool to combat counterfeiters, but does the fine-grained detail offer other advantages for SJTAG implementors or is it more a convenience for the device vendor? One suggestion is that even without knowing what the ECID data means ECIDs could be logged during board assembly, giving a means to uniquely identify a board at a later date by JTAG interrogation of the devices in the chain. How practical is this? What other uses might there be?
Ian McIntosh
Testability Lead
Leonardo UK

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