Treatment of TCK

Discussion and feedback on the SJTAG Initiative Group weekly meetings.
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Ian McIntosh
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Treatment of TCK

Post by Ian McIntosh » Mon May 11, 2015 6:18 pm

(Reconstruction of email thread)
Termination_Notes_Ben.pdf
Extract from Ben's slides
(412.37 KiB) Downloaded 56 times
I had to grab this as images of Ben's slides and notes, but it all seems to be reasonably readable.
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Bradford Van Treuren
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Re: Treatment of TCK

Post by Bradford Van Treuren » Mon May 11, 2015 6:24 pm

I had a discussion with one of our ICT gurus. He had some interesting comments regarding the need for using the pull down on TCK. His comments are:
An AC termination might not be sufficient because a disconnected TCK should not float mid-level which can result in excessive current or oscillating. TCK should park high or low.

The ICT has limited programming burst lengths. The programmable device vendors recommend holding TCK low while the ICT drivers are tri-stated between bursts.

Cannot get a low-to-high transition on TCK on power up with a pull down.

In reality a pull up seems to work just a well for ICT.
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Adam W Ley
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Re: Treatment of TCK

Post by Adam W Ley » Mon May 11, 2015 6:27 pm

Gents,

Are we talking about guidelines for “termination” at the first point of entry on a board (or system) or are talking about “termination” at each boundary scan device?

Note – I put “termination” in parentheses because that term is generally associated with signal integrity measures (transmission line impedance matching), which doesn’t actually seem to be at the core of this discussion, which seems more to do with logic-level conditioning …

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Re: Treatment of TCK

Post by Bradford Van Treuren » Mon May 11, 2015 6:28 pm

Adam,
I think SJTAG needs to deal with both first point of entry and at each device, especially if there is buffering or level shifting taking place between devices. Ian points out that last point of exit for TDO is also critical that often goes unlooked and not properly terminated, again especially for cases that connect to a backplane.

This will be a good and necessary discussion.
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Adam W Ley
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Re: Treatment of TCK

Post by Adam W Ley » Mon May 11, 2015 6:29 pm

OK, great. Thanks.

We’ll need to keep in mind that there are (at least these two) different cases (at point of entry; at terminal devices) and they will have different requirements …

We’ll also need to keep in mind that different devices have been designed with different assumptions and these can come into conflict.

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Re: Treatment of TCK

Post by Ian McIntosh » Mon May 11, 2015 6:33 pm

Adam W Ley wrote:We’ll also need to keep in mind that different devices have been designed with different assumptions and these can come into conflict.
Yes, I made that very point during the call on Monday. Sometimes though, the datasheet recommendation is made for best compliance with the vendor’s often very basic controller pod and following more standard practice might be perfectly OK.
Bradford Van Treuren wrote:An AC termination might not be sufficient because a disconnected TCK should not float mid-level which can result in excessive current or oscillating. TCK should park high or low.
While that is probably true, in practice I’ve never found that to be problem, possibly because the driven device at the board edge typically has an internal weak pull anyway - also noting that our antenna designs can be highly sensitive to electrical noise, and great care is taken to shut down chunks of circuitry where possible during receive cycles so I think we’d know if there were oscillating TCKs lurking in the background!
Bradford Van Treuren wrote:Given the BSDL is either LOW or BOTH and not HIGH option, we should really be looking at pull down.

I’d generally agree with that view. I noted in the meeting my preference for an AC termination of a R and C in series to ground, such as Pete Collins describes in Ben’s notes, mainly because I find it works reasonably well in the vast majority of cases but also because if does prove troublesome then it’s easy to swap out the C and replace it with another R to make simple pull-down with no re-tracking or wired modifications required.
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Adam W Ley
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Re: Treatment of TCK

Post by Adam W Ley » Mon May 11, 2015 6:33 pm

Hmm. I don’t quite follow your first statement, Ian.

To which datasheet are you referring and to which vendor?

To be clear for my part, when I said “different devices” in my original text, I was referring to end-points (1149.1-conforming ICs).

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Re: Treatment of TCK

Post by Ian McIntosh » Mon May 11, 2015 6:35 pm

Sorry Adam, I don’t have a specific example to hand, but have a recollection of a design I reviewed a couple of years back that featured a non-standard pull on, I think, one signal. When I queried it I was pointed to the notes on programming in the datasheet which gave the recommendation. However the device also claimed to be 1149.1 compliant, and it seemed there was something odd about the output buffer on the vendor’s own pod that led to the suggestion.

Maybe we should just consider this example as “noise”!

On the other hand, and more directly related to my comment during the call, Altera FPGAs often recommend a 1k pull-down on TCK and I’ve seen boards designed that carry that notion through to the board-edge side of the buffer/gateway. In a multidrop, having several boards like that on the bus can seriously load up TCK. From there you have the question of how you get a reasonable pull in that arrangement in all cases when the backplane may have one or many boards installed AND still have a reasonable pull when each board is tested outside the chassis.
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Ian McIntosh
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Re: Treatment of TCK

Post by Ian McIntosh » Mon May 11, 2015 7:49 pm

Discussed during weekly meeting of May 11, 2015:
http://www.sjtag.org/index.php/minutes/ ... 2015-05-11
Ian McIntosh
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